PhD position - Securing integrated circuits against deep learning based attacks

SL-DRT-19-0544

RESEARCH FIELD
Electronics and microelectronics - Optoelectronics

ABSTRACT
The context of this study is the security of embedded systems. Recent works bring to light that Artificial Intelligence, in particular Convolutional Neural Networks, allows reducing human efforts required for extract cryptographic secretes by side channel analysis. The obtained results also highlight that a part of usual countermeasures are not efficient against Deep Learning based analysis. In particular, some masking techniques [1] or the delay insertion [2] that are a common way to protect circuits seem inefficient. Then, it is necessary to understand how neural networks catch information leakages that are not exploited by the classical analyzing methods in order to propose suitable risks mitigation methods and the associated countermeasures.The goals of the thesis are:- bring a comprehension of the new threats constituted by Artificial Intelligence for the secure products certification- identify the vulnerabilities of the existing countermeasures and if possible rectify them- otherwise invent new countermeasures that take into account the new attacks schemes.More specifically, based on the existing works the candidate will learn to use the Deep Learning tools and reproduce state of the art results. The candidate will work with the teams that implement those new attacks and are pioneer in the field. The study will be followed by a security characterization of the known countermeasures against Deep Learning. Two mains approaches can be considered. First, enhance the difficulty to obtain an exploitable model during the profiling phase. Second, reduce the probability of correct classification.A profile in mathematics/computer science is adapted to the subject. Notions in Machine Learning would be welcome and knowledges in microelectronics are an advantage.[1] H. Maghrebi, T. Portigliatti, et E. Prouff, « Breaking Cryptographic Implementations Using Deep Learning Techniques. », IACR Cryptol. EPrint Arch., vol. 2016, p. 921, 2016.[2] E. Cagli, C. Dumas, et E. Prouff, « Convolutional Neural Networks with Data Augmentation Against Jitter-Based Countermeasures - Profiling Attacks Without Pre-processing. », in Cryptographic Hardware and Embedded Systems - CHES 2017 - 19th International Conference, Taipei, Taiwan, September 25-28, 2017, Proceedings, 2017, p. 45-68.

LOCATION
Département Systèmes

Laboratoire Sécurité des Objets et des Systèmes Physiques

Grenoble

CONTACT PERSON
LECOMTE Maxime

CEA

DRT/DSYS/SSSEC/LSOSP

CEA Grenoble17 rue des Martyrs38054 Grenoble

Phone number: 04381603

Email: maxime.lecomte@cea.fr

UNIVERSITY / GRADUATE SCHOOL
Montpellier

Information, Structures et Systèmes (I2S)

START DATE
Start date on 01-09-2019

THESIS SUPERVISOR
MAURINE Philippe

LIRMM

Université Montpellier 2LIRMMUMR 5506 - CC477161 rue Ada34095 Montpellier Cedex 5 - France

Phone number: 04.67.41.85.00

Email: Philippe.Maurine@lirmm.fr

« The age limit is 26 years for PhD offers and 30 years old for post-doc offers. »


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Société

CEA Tech

Lieux

Catégories

Dernier jour de candidature

2019-10-31


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